In a CDMA communication system, when each user terminal communicates with a base station by using the CDMA scheme, they use, as uplink communication channels (to be referred to as CHs hereinafter), an individual CH occupied by each user and a shared CH shared among all users. In this case, in many CDMA communication systems, an individual CH of each user and a shared CH are code-multiplexed with each other. At the time of demodulation, such a multiplexed channel is demultiplexed into an individual CH and a shared CH for each user to perform demodulation.
In this case, an individual CH is formed for each slot, the start timing of each slot is independently determined for each user at the time of call connection. Each slot comprises a Pilot portion and a Data portion. The Pilot portion accommodates a known symbol sequence determined for each slot in advance and is used to obtain a channel estimation value necessary for the demodulation of the Data portions of the individual CH and shared CH. The Data portion accommodates user data.
Since a shared CH is shared among all the users, although it is formed on a slot basis like an individual CH, the start timing is common to all the users and set in advance. The shared CH comprises only a Data portion. The Data portion accommodates user data. Since no Pilot portion exists in the shared CH, the shared CH can accommodate more user data than the individual CH.
It is obvious from the above description that the slot start timing difference between an individual CH and a shared CH changes for each user and is determined at the time of call connection. This is defined as a timing offset.
Conventionally, as a CDMA receiving apparatus used in such a CDMA communication system, an arrangement like that shown in FIG. 4 has been proposed (see, for example, Japanese Patent Laid-Open Nos. 2003-069451 and 2002-111570). This CDMA receiving apparatus comprises a reception antenna unit RA, a radio reception unit RX, and a plurality of user demodulation blocks. Although FIG. 4 shows only a user k demodulation block 1, other user demodulation blocks have similar arrangements.
The radio reception unit RX receives a signal in the radio band which is received by the reception antenna unit RA, performs processing such as amplification of the input signal, frequency conversion from the radio band to the baseband, quadrature detection, and analog/digital conversion, and outputs the result to the user k demodulation block 1. The user k demodulation block 1 comprises a path detection circuit 10, individual CH path demodulation units 1A to 1L, an individual CH RAKE combining circuit (to be referred to as a RAKE combining circuit) 14, shared CH path demodulation units 2A to 2L, and a shared CH RAKE combining circuit (to be referred to as a RAKE combining circuit) 24.
The path detection circuit 10 receives an output from the radio reception unit RX, detects the path delay of a user k individual CH signal with respect to the input signal, and notifies the individual CH path demodulation units 1A to 1L and the shared CH path demodulation units 2A to 2L of the path delay. In this case, the user A individual CH signal to the user k individual CH signal and the shared CH signal are multiplexed on the input signal, and multipath components of the respective signals which are produced by propagation delays are also multiplexed on the input signal.
As a method of multiplexing user individual CH signals and a shared CH, CDMA is generally used. However, TDMA (Time Division Multiple Access) can also be used to multiplex user individual CH signals. There are no limitations on a method of demultiplexing a plurality of multiplexed user signals, a method of detecting the path delays of multipath components, and the number of path delays to be detected.
In each of the individual CH path demodulation units 1A to 1L, an individual CH despreading circuit (to be referred to as a despreading circuit) 11 receives a radio reception output from the radio reception unit RX and the path delay of an individual CH path notified from the path detection circuit 10, and performs despreading operation for the radio reception output from the radio reception unit RX, thereby extracting a signal corresponding to a user k individual CH path. In addition, a channel estimation circuit (to be referred to as an estimation circuit hereinafter) 12 performs channel estimation on the basis of an output from the despreading circuit 11.
An individual CH demodulation circuit (to be referred to as a demodulation circuit hereinafter) 13 then receives an output from the despreading circuit 11 and a channel estimation value as an output from the estimation circuit 12, and demodulates the Data portion. With this operation, the Data portion is demodulated after the influence of the channel is removed therefrom by using a channel estimation value at the reception timing of the Data portion. The RAKE combining circuit 14 RAKE-combines the outputs from the individual CH path demodulation units 1A to 1L and outputs the user k individual CH demodulation result.
In each of the shared CH path demodulation units 2A to 2L, a shared CH despreading circuit (to be referred to as a despreading circuit hereinafter) 21 receives a radio reception output from the radio reception unit Rx and the path delay of an individual CH path which is notified from the path detection circuit 10, and performs despreading operation for the radio reception output from the radio reception unit RX, thereby extracting a signal corresponding to the user k shared CH path. A shared CH demodulation circuit (to be referred to as a demodulation circuit hereinafter) 23 receives an output from the despreading circuit 21 and a channel estimation value from one of the estimation circuits 12 corresponding to the individual CH path demodulation units 1A to 1L, and demodulates the Data portion of the shared CH.
With this operation, the Data portion of the shared CH is demodulated by removing the influence of the channel by using the transmission estimation value at the reception timing of the Data portion of the individual CH. The RAKE combining circuit 24 receives outputs from the shared CH path demodulation units 2A to 2L, RAKE-combines them, and outputs the user k shared CH demodulation result.
FIG. 5 shows an example of demodulating operation. As in this example, in demodulating the Data portions of an individual CH and shared CH, a channel estimation value is calculated first by using the Pilot portion of the individual CH. The Data portion of the individual CH is demodulated by removing the influence of the channel by using the channel estimation value of the self-slot or a channel estimation value at the reception timing of the Data portion which is obtained from the channel estimation values of the self-slot and several adjacent slots by interpolation. In addition, as in the case of the Data portion of the individual CH, the Data portion of the shared CH is demodulated by removing the influence of the channel by using the channel estimation value at the reception timing of the Data portion.
Uplink transmission power control is performed for each slot of an individual CH. Uplink transmission power to a shared CH is determined by giving a fixed or variable power offset to the uplink transmission power to an individual CH. Therefore, uplink transmission power control on a shared CH is performed on a slot basis with a predetermined time lag defined by a timing offset. In addition, no uplink transmission power control may be performed on a shared CH. That is, in some case, uplink transmission power is kept constant.
In this case, uplink transmission power control is the operation of comparing the uplink reception SIR (Signal to Interference Ratio) in a base station with a predetermined threshold, performing uplink transmission power increase control if the SIR is smaller than the threshold, and performing uplink transmission power decrease control if the SIR is larger than the threshold. As in the above CDMA radio communication system, according to the scheme of transmitting user data by using a shared CH, radio resources can be efficiently used. In addition, since all the users can be scheduled at common timings, this system is also suitable for control on the delay time of each user data.